5.4 Effective Addresses and Segment Selection

Section 5.3 calculated a 16-bit effective address. That value is not yet the physical address placed on the 8086 bus. The BIU must pair EA with a segment register:

The instruction often omits the segment name because the 8086 applies a default rule.

The central default rule

For the general memory-address expressions introduced in this chapter:

• use SS when the effective-address calculation contains BP;

• otherwise use DS.

Therefore:

The rule concerns which register participates in the encoded effective address, not whether the programmer informally thinks of the data as “stack data.”

Other instruction classes have their own fixed or conventional segment behavior. Instruction fetch uses CS:IP, stack operations use SS:SP, string sources normally use DS:SI, and string destinations use ES:DI. Learn each special instruction together with its segment rule rather than forcing every case through the general BP test.

A segment override replaces the default

A segment-override prefix explicitly names CS, DS, SS, or ES for a memory operand. For example:

MOV AX,DS:[BP+SI]

The effective address is still BP+SI; only the segment source changes from default SS to DS. The prefix adds an instruction byte, so it should express a real addressing need rather than be added mechanically.

Lab 1 — predict and override the selected segment

Choose a memory expression and optional prefix. The router shows the default decision, the actually selected segment, EA, and resulting physical address as one causal path.

Check your understanding

The same EA can reach different physical memory

Assume:

Then:

The offset is identical, but the physical addresses differ by 10000H. If 20120H contains CAFEH and 30120H contains BEEFH, a program using [BP+SI] without an override reads BEEFH because BP selects default SS.

This creates a common debugging pattern:

1. Register arithmetic appears correct.

2. EA is the expected number.

3. The returned data is wrong.

4. The actual fault is the selected segment.

As on the original 8086 in Chapter 4, only low 20 address bits reach pins A19…A0 if the addition produces another bit.

Lab 2 — diagnose a correct-EA, wrong-data bug

Four segments hold different test words at the same EA. Keep or change the address expression, apply an override when justified, issue reads, and compare the actual physical addresses and returned values.

Check your understanding

Full memory-operand algorithm

When you see an 8086 memory operand:

1. Decode mod and r/m; identify legal address registers and displacement.

2. Calculate EA and retain its low 16 bits.

3. Choose the default segment: SS for a BP-based general address, otherwise DS.

4. Replace that choice if a valid segment-override prefix is present.

5. Shift the selected segment left four bits and add EA.

6. Use the resulting 20-bit bus address to read or write the operand bytes.

This completes the bridge from machine-code fields to a physical memory transaction. Chapter 6 can now use these rules while teaching data transfer, arithmetic, logic, shifts, comparisons, branches, loops, and string instructions.