3.3 Latches, Flip-Flops, and Registers

The circuits in Sections 3.1 and 3.2 forget immediately: changing an input changes the combinational result. A processor also needs to preserve operands, addresses, instructions, and intermediate results. A circuit that remembers has state—information carried from the past into the present.

Feedback creates a one-bit memory

Feedback sends part of a circuit’s output back into its input. Two cross-coupled NOR gates form an SR latch, where S means set, R means reset, and Q is the stored bit.

The hold row is the key difference from combinational logic. With S=R=0, the next Q is not determined by those two inputs alone; it depends on the value stored earlier.

For a NOR SR latch, S=R=1 is forbidden because Q and its complement Q̅ are both forced to 0. When both inputs return to 0, tiny timing differences can decide the resulting state. A design must avoid relying on that release.

Lab 1 — store, hold, reset, and break the contract

Apply S and R combinations in different orders. The history table makes it visible that identical 00 inputs can preserve either Q=0 or Q=1.

Check your understanding

A clock tells storage when to change

Allowing state to change whenever inputs change can make a large system difficult to coordinate. A clock is a repeating timing signal. A clock edge is a transition from 0 to 1 or from 1 to 0.

A D flip-flop samples data input D at its active clock edge and stores that bit at Q until a later active edge.

The letter D can be remembered as “data.” The flip-flop removes the SR latch’s ordinary need for separate set and reset data controls: at the sampling edge, Q simply takes D.

Registers store several bits together

A register is a group of flip-flops controlled together. Four D flip-flops can store one 4-bit word:

A register may support several modes:

• hold: preserve all bits;

• parallel load: copy D3…D0 into Q3…Q0 in one edge;

• shift left: move each stored bit left and insert one serial bit at the right;

• shift right: move each stored bit right and insert one serial bit at the left.

For example, shifting 1010 left while inserting 1 produces 0101 at the next edge. The old leftmost bit is discarded because the width remains four bits.

Lab 2 — control a register at the clock edge

Choose a mode, set parallel or serial inputs, and issue clock pulses. The trace distinguishes changing an input from actually storing it.

Check your understanding

Latch, flip-flop, and register are not synonyms

Registers will later appear as the 8086’s AX, BX, instruction pointer, and flags. Before using those named registers, the next section examines the clock, counters, and the timing constraints that make edge-triggered storage reliable.