4.2 Registers and the Programmer's Model
A transistor-level chip contains many internal storage elements, but a programmer does not name them all. The programmer's model is the set of registers and state that instructions expose.
On the 8086, a word is 16 bits and a byte is 8 bits. Most programmer-visible registers are one word wide.
The register families
| Family | Registers | Main purpose at this stage |
|---|---|---|
| General data | AX, BX, CX, DX | arithmetic, logic, data, and common instruction roles |
| Pointer and index | SP, BP, SI, DI | stack locations and indexed memory traversal |
| Segment | CS, DS, SS, ES | provide segment values for address formation |
| Instruction position | IP | offset used for the next sequential instruction-byte fetch within the code segment |
| Machine status/control | FLAGS | records arithmetic outcomes and controls selected behaviors |
These descriptions are defaults and conventions, not universal prohibitions. For example, AX is commonly called the accumulator, but many instructions can use other registers. The exact instruction determines which operands are legal and which register has an implied role.
One word, three names
AX, BX, CX, and DX each expose two byte-sized aliases:
| 16-bit register | High byte, bits 15–8 | Low byte, bits 7–0 |
|---|---|---|
| AX | AH | AL |
| BX | BH | BL |
| CX | CH | CL |
| DX | DH | DL |
The aliases are not copies. If AX is 1234H, then AH is 12H and AL is 34H. Writing ABH to AL changes AX to 12ABH while AH stays 12H. Writing the whole AX afterward replaces both bytes.
SP, BP, SI, and DI do not have 8-bit high/low aliases in the original 8086 programmer's model.
Lab 1 — edit overlapping register views
Write AX, AH, and AL through different views. Missions require preserving the untouched byte, assembling a word through both byte aliases, and replacing the complete word in one operation.
Check your understanding
Registers cooperate during operations
Register names become easier to remember when connected to movement:
- IP (Instruction Pointer) supplies the offset for the next sequential instruction-byte fetch in the current code segment. The BIU advances it as bytes are fetched; a control transfer loads a new offset and invalidates stale queued bytes. Because prefetch can place bytes ahead of execution in the queue, do not treat internal IP at every instant as a meter of the exact byte currently executing.
- SP (Stack Pointer) identifies the top of the stack within the stack segment. The 8086 stack grows toward lower offsets: a word push subtracts 2 from SP before storing, while a word pop reads and then adds 2.
- BP (Base Pointer) commonly refers to data in the stack segment without changing SP.
- SI (Source Index) and DI (Destination Index) commonly locate source and destination data, especially for string instructions.
- CX often supplies a repetition count; DX often extends arithmetic or carries an I/O port address; BX often serves as a base register. These are common roles, not the complete instruction set.
A register change is state change. Always calculate from the previous state, then commit the new state. For repeated actions, the output of one step becomes the input of the next.
Lab 2 — choreograph a register-state trace
Choose operations in any order and watch only the registers affected by each operation move. Complete missions involving fetch, repeated copying, arithmetic, and stack activity; the event trace records the resulting state transitions.
Check your understanding
Avoid four common confusions
1. A register name is not a memory address. A register holds a bit pattern; an instruction may interpret that pattern as data, an offset, or something else.
2. AH and AL are not independent of AX. They are views into the same sixteen bits.
3. IP alone is not a physical address. Instruction fetch uses a segment value together with IP; Section 4.4 derives the address.
4. A conventional role is not an automatic action. Calling CX a count register does not make it decrease. Only an instruction that updates CX changes it.
The next section examines FLAGS, the register that records selected facts about a result and controls direction, interrupt recognition, and single-step behavior.