10.1 RAM, ROM, SRAM, and DRAM

Chapter 9 established how a processor completes a bus transfer. A memory device gives selected addresses persistent bit locations across bus cycles. Memory technologies differ in whether software may write them, whether power is required to retain data, and how much maintenance each stored bit needs.

RAM and ROM describe how the system uses stored contents

Random-access memory (RAM) allows the processor to reach any addressed location without reading all earlier locations. In ordinary computer usage, RAM is readable and writable. It is normally volatile: removing power loses its contents.

Read-only memory (ROM) provides contents intended to survive power loss and ordinary execution. It is nonvolatile. Some ROM families can be programmed or erased using special procedures, but a normal memory write cycle does not make them equivalent to working RAM.

ROM commonly stores startup firmware because its first instruction must exist before RAM has been initialized. RAM holds stacks, variables, buffers, and code loaded while the machine is running.

SRAM and DRAM store volatile bits differently

Static RAM (SRAM) holds each bit in a small stable logic circuit. “Static” means the bit needs no periodic refresh while power remains; it does not mean nonvolatile. SRAM offers fast, straightforward access but uses more circuit area per bit.

Dynamic RAM (DRAM) stores a bit as electrical charge in a compact cell. Charge leaks, so a memory controller must periodically sense and restore rows. This refresh consumes command time but allows high bit density.

A DRAM read is destructive at the cell level because sensing disturbs the small stored charge; the sense circuitry restores the detected value. Modern DRAM hides much of this detail behind commands and controllers, but refresh deadlines still affect availability and performance.

No technology wins every metric:

• ROM provides power-off retention but not frequent ordinary writes.

• SRAM avoids refresh and is fast, but is less dense.

• DRAM provides dense writable storage, but needs refresh and more control.

Section 10.1 has described what a memory chip can do. Section 10.2 explains how high address bits make exactly one chip respond to a particular range.