11.1 Isolated and Memory-Mapped I/O

Chapter 10 followed an address until one memory chip responded. A processor must also exchange data with devices such as switches, displays, and controllers. An input/output interface sits between the CPU bus and a device. It exposes small storage locations called ports or device registers, then translates bus reads and writes into device actions.

Decide which address space owns a device register

An address space is the set of addresses interpreted by one access mechanism. In isolated I/O (also called port-mapped I/O), memory and I/O use separate spaces. On the 8086, IN and OUT instructions select I/O space, while bus control distinguishes an I/O cycle from a memory cycle. A port address can therefore equal a memory address without conflict: memory location 0060H and I/O port 0060H are different destinations.

In memory-mapped I/O, a device register occupies an address inside the ordinary memory space. Normal memory instructions can then operate on it, but every assigned device window consumes addresses that could otherwise select memory.

The choice changes the software interface and the decoder, not the device’s fundamental purpose. Isolated I/O preserves memory address space and makes device access explicit. Memory-mapped I/O permits ordinary addressing modes and memory operations. A design review must ask which instructions are legal, which bus-cycle type the decoder checks, and whether any window overlaps another target.

Trace IN and OUT as data transfers

For the 8086, IN moves data from an I/O port into AL or AX; OUT moves data from AL or AX to an I/O port. The accumulator width determines whether the transfer is 8 or 16 bits.

A port may be supplied in either of two ways:

• An 8-bit immediate value inside the instruction selects ports 00H–FFH.

• Register DX supplies a 16-bit port address, allowing ports 0000H–FFFFH.

For example, if DX=03F8H and a status port contains 60H, IN AL, DX copies 60H into AL; it does not modify DX or the port. If AL=55H, OUT DX, AL sends 55H to the selected device register. Reversing the operands would reverse the intended data-flow meaning and is not a valid 8086 form.

The port address selects a register; it is not the data value. The accumulator carries data; it does not select the port. Keeping those roles separate prevents a common first-program error.

Now the CPU can reach device registers. Section 11.2 asks how hardware selects one port reliably and how software learns whether the device is ready.