11.3 Handshaking and Parallel Transfer

Section 11.2 used a status bit that software sampled whenever it chose. When two units have unrelated timing, a transfer needs a stronger agreement. A handshake uses control signals so the sender announces valid data and the receiver confirms acceptance.

Complete a four-phase handshake

Consider an active-high request signal STB and acknowledgement signal ACK. A safe four-phase transfer proceeds as follows:

1. The sender places a stable data word on the parallel data lines.

2. The sender asserts STB, announcing that the word is valid.

3. The receiver captures the word and asserts ACK.

4. The sender sees ACK, removes STB, and may release the data.

5. The receiver sees STB inactive and removes ACK, returning both sides to idle.

The signals do not need fixed delays between steps. Each side waits for an observed event, so a fast sender can communicate with a slower receiver. However, data must remain stable from before STB becomes active until the receiver has acknowledged it. That interval is the transfer’s data-valid window.

If the sender changes data before ACK, the receiver may capture a mixed or newer value. If either side waits for the wrong signal level, the interface can deadlock: both sides remain active but no next transition is possible.

Match producer and consumer rates

A parallel path carries several bits at once, but width alone does not guarantee reliable throughput. A producer creates words; a consumer accepts them. If the producer can create a new word while the consumer is busy, the interface needs either backpressure or temporary storage.

Backpressure is a signal that tells the producer to pause. A first-in, first-out buffer (FIFO) can absorb short bursts: each accepted word joins the tail, and the consumer removes the oldest word from the head. If the FIFO is full and the producer still writes, an overrun occurs and data is lost. If the consumer reads an empty FIFO, an underrun occurs.

Increasing FIFO depth tolerates a longer burst, but it cannot repair a permanently higher average producer rate. Reliable design therefore considers width, handshake latency, buffer depth, and average service rate together.

Handshaking explains the mechanism. Section 11.4 applies it through the programmable 8255 interface and then connects that interface to visible keyboard and display hardware.